Initial. Don't... just don't ask.
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Ryan McGrath
commit
00bae13bba
586 changed files with 129057 additions and 0 deletions
309
kernel/svgalib_helper/interrupt.c
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309
kernel/svgalib_helper/interrupt.c
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#include <linux/pci.h>
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#include <linux/mm.h>
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#include <asm/io.h>
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#include "kernel26compat.h"
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#include "svgalib_helper.h"
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int vga_test_vsync(struct sh_pci_device *dev) {
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return inb(0x3c2)&0x80;
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}
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void vga_ack_vsync(struct sh_pci_device *dev) {
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int pb;
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/* clear pending */
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outb(0x11, 0x3d4);
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pb = inb(0x3d5);
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outb(0x11, 0x3d4);
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outb((pb&0xef) | 0x20, 0x3d5);
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/* disable interrupts */
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outb(0x11, 0x3d4);
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pb = inb(0x3d5);
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outb(0x11, 0x3d4);
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outb(pb | 0x20 , 0x3d5);
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}
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void vga_enable_vsync(struct sh_pci_device *dev) {
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int pb;
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/* enable interrupt, clear pending */
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outb(0x11, 0x3d4);
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pb = inb(0x3d5);
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outb(0x11, 0x3d4);
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outb((pb&0xcf) , 0x3d5);
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/* Allow interrupts */
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outb(0x11, 0x3d4);
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pb = inb(0x3d5);
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outb(0x11, 0x3d4);
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outb(pb | 0x10 , 0x3d5);
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}
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int io_test_vsync(struct sh_pci_device *dev) {
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return inb(dev->iobase+0x3c2)&0x80;
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}
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void io_ack_vsync(struct sh_pci_device *dev) {
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int pb;
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/* clear pending */
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outb(0x11, dev->iobase+0x3d4);
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pb = inb(dev->iobase+0x3d5);
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outb(0x11, dev->iobase+0x3d4);
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outb((pb&0xef) | 0x20, dev->iobase+0x3d5);
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/* disable interrupts */
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outb(0x11, dev->iobase+0x3d4);
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pb = inb(dev->iobase+0x3d5);
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outb(0x11, dev->iobase+0x3d4);
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outb(pb | 0x20 , dev->iobase+0x3d5);
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}
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void io_enable_vsync(struct sh_pci_device *dev) {
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int pb;
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/* enable interrupt, clear pending */
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outb(0x11, dev->iobase+0x3d4);
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pb = inb(dev->iobase+0x3d5);
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outb(0x11, dev->iobase+0x3d4);
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outb((pb&0xcf) , dev->iobase+0x3d5);
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/* Allow interrupts */
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outb(0x11, dev->iobase+0x3d4);
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pb = inb(dev->iobase+0x3d5);
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outb(0x11, dev->iobase+0x3d4);
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outb(pb | 0x10 , dev->iobase+0x3d5);
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}
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int mm_test_vsync(struct sh_pci_device *dev) {
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return readb(dev->membase+0x3c2)&0x80;
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}
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void mm_ack_vsync(struct sh_pci_device *dev) {
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int pb;
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/* clear pending */
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writeb(0x11, dev->membase+0x3d4);
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pb = readb(dev->membase+0x3d5);
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writeb(0x11, dev->membase+0x3d4);
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writeb((pb&0xef) | 0x20, dev->membase+0x3d5);
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/* disable interrupts */
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writeb(0x11, dev->membase+0x3d4);
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pb = readb(dev->membase+0x3d5);
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writeb(0x11, dev->membase+0x3d4);
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writeb(pb | 0x20 , dev->membase+0x3d5);
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}
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void mm_enable_vsync(struct sh_pci_device *dev) {
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int pb;
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/* enable interrupt, clear pending */
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writeb(0x11, dev->membase+0x3d4);
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pb = readb(dev->membase+0x3d5);
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writeb(0x11, dev->membase+0x3d4);
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writeb((pb&0xcf) , dev->membase+0x3d5);
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/* Allow interrupts */
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writeb(0x11, dev->membase+0x3d4);
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pb = readb(dev->membase+0x3d5);
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writeb(0x11, dev->membase+0x3d4);
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writeb(pb | 0x10 , dev->membase+0x3d5);
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}
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int s3_test_vsync(struct sh_pci_device *dev) {
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return readl(dev->membase+0x8504) & 1;
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}
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void s3_enable_vsync(struct sh_pci_device *dev) {
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writel(0x101, dev->membase+0x8504);
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}
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void s3_ack_vsync(struct sh_pci_device *dev) {
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writel(0x001, dev->membase+0x8504);
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}
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static uint32_t saved_pmc=0xffffffff;
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int nv3_test_vsync(struct sh_pci_device *dev) {
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return readl(dev->membase+0x400100)&0x100;
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}
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void nv3_ack_vsync(struct sh_pci_device *dev) {
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/* disable interrupt, clear pending */
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writel(0xffffffff, dev->membase + 0x000100);
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writel(0x100, dev->membase + 0x400100);
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writel(0, dev->membase + 0x000140);
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writel(0, dev->membase + 0x400140);
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if(saved_pmc!=0xffffffff)
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writel(saved_pmc, dev->membase + 0x000200);
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}
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void nv3_enable_vsync(struct sh_pci_device *dev) {
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saved_pmc = inl(dev->iobase + 0x200);
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writel(saved_pmc|0x1000, dev->membase+0x200);
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writel(0x1, dev->membase + 0x000140);
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writel(0x100, dev->membase + 0x400140);
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writel(0xffffffff, dev->membase + 0x000100);
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writel(0xffffffff, dev->membase + 0x400100);
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}
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int nv4_test_vsync(struct sh_pci_device *dev) {
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return readl(dev->membase+0x600100)&0x1;
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}
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void nv4_ack_vsync(struct sh_pci_device *dev) {
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/* disable interrupt, clear pending */
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writel(0xffffffff, dev->membase + 0x000100);
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writel(0x1, dev->membase + 0x600100);
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writel(0, dev->membase + 0x000140);
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writel(0, dev->membase + 0x600140);
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writel(saved_pmc, dev->membase + 0x000200);
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}
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void nv4_enable_vsync(struct sh_pci_device *dev) {
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saved_pmc = inl(dev->iobase + 0x200);
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writel(saved_pmc|(1<<24),dev->membase+0x200);
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writel(0x1, dev->membase + 0x000140);
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writel(0x1, dev->membase + 0x600140);
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writel(0xffffffff, dev->membase + 0x000100);
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writel(0xffffffff, dev->membase + 0x600100);
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}
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int r128_test_vsync(struct sh_pci_device *dev) {
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return readl(dev->membase + 0x44) &1;
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}
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void r128_ack_vsync(struct sh_pci_device *dev) {
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writel(1, dev->membase + 0x44);
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writel(readl(dev->membase + 0x40) & 0xfffffffe, dev->membase + 0x40);
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}
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void r128_enable_vsync(struct sh_pci_device *dev) {
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writel(1, dev->membase + 0x44);
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writel(readl(dev->membase + 0x40) | 1, dev->membase + 0x40);
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}
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int rage_test_vsync(struct sh_pci_device *dev) {
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return inl(dev->iobase + 0x18) &4;
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}
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void rage_ack_vsync(struct sh_pci_device *dev) {
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outl((inl(dev->iobase + 0x18) & 0xfffffff8) | 12, dev->iobase + 0x18);
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}
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void rage_enable_vsync(struct sh_pci_device *dev) {
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outl((inl(dev->iobase + 0x18) & 0xfffffff8) | 14, dev->iobase + 0x18);
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}
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int rendition_test_vsync(struct sh_pci_device *dev) {
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return inw(dev->iobase + 0x44) & 1;
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}
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void rendition_ack_vsync(struct sh_pci_device *dev) {
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outw(1, dev->iobase + 0x44);
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outw(0, dev->iobase + 0x46);
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}
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void rendition_enable_vsync(struct sh_pci_device *dev) {
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outw(1, dev->iobase + 0x44);
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outw(1, dev->iobase + 0x46);
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}
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void vga_init_vsync(struct sh_pci_device *dev) {
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int i, id;
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switch(dev->vendor) {
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case PCI_VENDOR_ID_MATROX:
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i=0;
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if(dev->len[0]>=1048576)i=1;
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dev->membase = ioremap(dev->mem[i],0x2000) + 0x1c00;
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dev->test_vsync = mm_test_vsync;
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dev->ack_vsync = mm_ack_vsync;
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dev->enable_vsync = mm_enable_vsync;
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dev->disable_vsync = mm_ack_vsync;
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break;
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case PCI_VENDOR_ID_SI: /* SiS */
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dev->iobase = dev->mem[2]-0x380;
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dev->test_vsync = io_test_vsync;
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dev->ack_vsync = io_ack_vsync;
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dev->enable_vsync = io_enable_vsync;
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dev->disable_vsync = io_ack_vsync;
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break;
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case PCI_VENDOR_ID_NVIDIA_SGS:
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dev->membase = ioremap(dev->mem[0],0x800000);
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if(dev->id<0x20) {
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dev->test_vsync = nv3_test_vsync;
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dev->ack_vsync = nv3_ack_vsync;
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dev->enable_vsync = nv3_enable_vsync;
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dev->disable_vsync = nv3_ack_vsync;
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} else {
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dev->test_vsync = nv4_test_vsync;
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dev->ack_vsync = nv4_ack_vsync;
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dev->enable_vsync = nv4_enable_vsync;
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dev->disable_vsync = nv4_ack_vsync;
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}
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break;
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case PCI_VENDOR_ID_NVIDIA:
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dev->membase = ioremap(dev->mem[0],0x800000);
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dev->test_vsync = nv4_test_vsync;
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dev->ack_vsync = nv4_ack_vsync;
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dev->enable_vsync = nv4_enable_vsync;
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dev->disable_vsync = nv4_ack_vsync;
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break;
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case PCI_VENDOR_ID_ATI:
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id=dev->id;
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if( (id==0x4c45) ||
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(id==0x4c46) ||
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(id==0x4c57) ||
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(id==0x4c59) ||
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(id==0x4c5a) ||
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(id==0x4d46) ||
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(id==0x4d4c) ||
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(id==0x4242) ||
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((id>>8)==0x50) ||
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((id>>8)==0x51) ||
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((id>>8)==0x52) ||
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((id>>8)==0x53) ||
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((id>>8)==0x54)) {
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dev->membase = ioremap(dev->mem[2], 16384);
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dev->test_vsync = r128_test_vsync;
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dev->ack_vsync = r128_ack_vsync;
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dev->enable_vsync = r128_enable_vsync;
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dev->disable_vsync = r128_ack_vsync;
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} else {
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dev->iobase = dev->mem[1];
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dev->test_vsync = rage_test_vsync;
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dev->ack_vsync = rage_ack_vsync;
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dev->enable_vsync = rage_enable_vsync;
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dev->disable_vsync = rage_ack_vsync;
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}
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break;
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case PCI_VENDOR_ID_RENDITION:
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dev->iobase = dev->mem[1];
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dev->test_vsync = rendition_test_vsync;
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dev->ack_vsync = rendition_ack_vsync;
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dev->enable_vsync = rendition_enable_vsync;
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dev->disable_vsync = rendition_ack_vsync;
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break;
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case PCI_VENDOR_ID_S3:
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dev->membase = ioremap(dev->mem[0]+0x1000000, 0x10000);
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dev->test_vsync = s3_test_vsync;
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dev->ack_vsync = s3_ack_vsync;
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dev->enable_vsync = s3_enable_vsync;
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dev->disable_vsync = s3_ack_vsync;
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break;
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default:
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dev->test_vsync = vga_test_vsync;
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dev->ack_vsync = vga_ack_vsync;
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dev->enable_vsync = vga_enable_vsync;
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dev->disable_vsync = vga_ack_vsync;
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dev->iobase = 0;
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}
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}
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